发明名称 SINGLE-INSTRUCTION PLURAL DATA PROCESSING USING PLURAL BANKS OR VECTOR REGISTER
摘要 <p>PROBLEM TO BE SOLVED: To make a multi-media signal processor provide an adequate price, high computing power, and familiar programming environment by accessing a vector register discriminated by the combination of a register number and a value from a default bank field. SOLUTION: The processor 110 is present mainly for a control function for the execution of a real-time arithmetic system and similar functions which do not require many operation. Further, a processor 120 is discriminated with an instruction word by using a 5-bit register number within a range of 0 to 31. Further, 64 288-bit vector registers consisting of two banks of a 32-bit vector register are present. The respective vector registers are discriminated with a 1-bit bank number (0 or 1) and 5-bit vector register numbers 0 to 31. Then the majority instruction words access vector registers in a current bank specified with a default bank bit CBNAK stored in a control register VCSR of a vector processor 120.</p>
申请公布号 JPH10116268(A) 申请公布日期 1998.05.06
申请号 JP19970237665 申请日期 1997.08.19
申请人 SAMSUNG ELECTRON CO LTD 发明人 NGUYEN LE TRONG;SONG SEUNGYOON PETER;MOHAMED MOATAZ A;PARK HEON CHUL;WONG RONEY SAU DON
分类号 G06F17/16;G06F9/30;G06F9/318;G06F12/00;G06F15/16;G06F15/78;(IPC1-7):G06F17/16 主分类号 G06F17/16
代理机构 代理人
主权项
地址