| 摘要 |
<p>A decoding output of a B-picture is given to a memory. A memory control circuit divides a one (1) image plane to four (4) regions. Write is executed to the memory every each of divided image data that are the decoding output with respect to eight (8) regions of first and second fields. In accordance with the field to which the divided image data belong and a position on an image plane, time at which each of the divided image data are retained in the memory is decided. On the basis of this, subsequent to the readout of the divided image data, the other divided image data are written to a common storage region of the memory. Thus, a memory capacity is reduced to enable interlacement conversion. <IMAGE></p> |
