发明名称 |
Method for forming multilayered wiring in a semiconductor device |
摘要 |
The method can remove a material layer produced in the step of etching back an organic SOG layer (150) or forming a via hole, by irradiating ultraviolet rays to the surface of the substrate or exposing the substrate under an O 2 or O 3 plasma atmosphere after etching back the organic SOG layer (150) or forming the via hole. Thus, deterioration of electrical characteristics of a semiconductor device, which is caused by electrical contact failures between upper and lower conductive layer patterns or flaking of an interlayer dielectric layer pattern (140), can be prevented.
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申请公布号 |
GB2318908(A) |
申请公布日期 |
1998.05.06 |
申请号 |
GB19970011078 |
申请日期 |
1997.05.28 |
申请人 |
* SAMSUNG ELECTRONICS CO LIMITED |
发明人 |
YOUNG-HUN * PARK;SUNG-HOON * KO;JONG-SEOB * LEE |
分类号 |
H01L21/3205;H01L21/3105;H01L21/311;H01L21/768;H01L23/522;(IPC1-7):H01L21/310 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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