发明名称 Enhanced information processing system using cache memory indication during DMA accessing
摘要 An information processing system includes a central processing unit, a main storage, a main storage controller for controlling the main storage, a cache memory having a content of at least one part of addresses stored in the main storage, at least one DMA controller which is capable of referring to the main storage and a DMA address translation unit for translating a logical address outputted from the DMA controller into a physical address for referring to the main storage. The DMA address translation unit has a flag representing whether or not the cache memory is referred to on DMA. The main storage controller performs either of reference to the cache memory or direct reference to the main storage based upon the flag on DMA.
申请公布号 US5749093(A) 申请公布日期 1998.05.05
申请号 US19950389080 申请日期 1995.02.14
申请人 HITACHI, LTD.;HITACHI COMPUTER ELECTRONICS CO., LTD. 发明人 KOBAYASHI, KAZUSHI;AOKI, TAKESHI;OKAZAWA, KOICHI;ABURANO, ICHIHARU
分类号 G06F12/02;G06F12/08;G06F12/10;G06F13/12;G06F13/28;(IPC1-7):G06F12/08 主分类号 G06F12/02
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