| 摘要 |
In an image reading apparatus arranged such that the supply of a drive clock signal CCD-CLK to a CCD solid-state imaging device is stopped during a standby period when an image is not read, during the standby period a high-level control signal CCDEN is generated by a clock-generating circuit, and is imparted to the CCD solid-state imaging device through an OR circuit and an inverter 14 so as to hold the drive clock signal CCD-CLK at a low level, thereby holding an output signal level of the CCD solid-state imaging device at a d.c. output bias level.
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