发明名称 Forward and inverse discrete cosine transform circuits
摘要 Discrete cosine transform circuits suitable for inverse discrete cosine transform (IDCT) or forward discrete cosine transform (FDCT) are disclosed. An IDCT circuit includes a group of multipliers and a group of adders/subtracters. The multipliers receive plural pieces of input data which are externally supplied in parallel. Each multiplier has a cosine constant to multiply to the received input data. The adders/subtracters receive multiplication results from the multipliers and perform addition/subtraction thereon to produce output data, which is the result of inverse discrete cosine transform of the input data. An FDCT circuit includes a group of input-stage adders/subtracters, a group of multipliers, and a group of output-stage adders. The input-stage adders/subtracters perform addition/subtraction on input data which are externally supplied in parallel. Computation results of the input-stage adders/subtracters is supplied to the multipliers. The output-stage adders receive multiplication results from the multipliers and produce output data, which is the result of forward discrete cosine transform of the input data. The discrete cosine transform circuits are particularly suitable for use in MPEG video encoders/decoders.
申请公布号 US5748514(A) 申请公布日期 1998.05.05
申请号 US19950564480 申请日期 1995.11.29
申请人 SANYO ELECTRIC CO., LTD. 发明人 OKADA, SHIGEYUKI;TANAHASHI, NAOKI;NAKASHIMA, HAYATO
分类号 H04N7/30;G06F17/14;G06T9/00;H04N1/41;(IPC1-7):G06F17/14 主分类号 H04N7/30
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