发明名称 Enhanced defect elimination process for electronic assemblies via application of sequentially combined multiple stress processes
摘要 A method for testing electronic assemblies having an electronic component affixed via solder or other such connections to a printed circuit board. The method includes combining, in order, three sequential stress test steps, into a single stress test for screening defects in the electronic assemblies. In particular, the test combines a thermal cycling stress test followed by a electrical burn-in stress test coupled with functional monitoring of the assembly, followed by a random vibration stress test coupled with functional monitoring of the assembly, each test is imposed with defined parameters upon the electronic assembly. The combination, order, and parameters of the sequential stress test steps provide a single test for electrical assemblies which substantially screens all such assemblies having systematic or random defects while imparting minimal reduction in useful life to the defect-free assemblies by virtue of the testing, thereby resulting in a high reliability product.
申请公布号 US5744975(A) 申请公布日期 1998.04.28
申请号 US19960660621 申请日期 1996.06.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 NOTOHARDJONO, BUDY DARMONO;COZZOLINO, VINCENT
分类号 G01R31/28;(IPC1-7):G01R31/02 主分类号 G01R31/28
代理机构 代理人
主权项
地址