发明名称 |
INTEGRATED CIRCUIT AND ITS TESTING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To test an analog core circuit and a digital core circuit quickly in an integrated circuit where they coexist. SOLUTION: A plurality of analog boundary scan cells 105 that are arranged at the outer periphery of an analog core circuit 102 are connected in series by an analog boundary scan path 107. A plurality of digital boundary scan cells 106 that are arranged at the outer periphery of a digital core circuit 103 are connected in series by a digital boundary scan path 108. The analog and digital boundary scan paths 107 and 108 are mutually independent. When the analog and digital core circuits 102 and 103 are tested, the dedicated boundary scan paths 107 and 108 are selected, test control data or test data are shifted only by a plurality of exclusive boundary scan cells 105 or 106 and are set. |
申请公布号 |
JPH10104321(A) |
申请公布日期 |
1998.04.24 |
申请号 |
JP19970205582 |
申请日期 |
1997.07.31 |
申请人 |
MATSUSHITA ELECTRON CORP |
发明人 |
MIZOKAWA TAKU;HIRAYAMA KATSUHIRO |
分类号 |
G01R31/316;G01R31/28;G06F11/22;H01L21/822;H01L27/04 |
主分类号 |
G01R31/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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