| 摘要 |
The disclosed device allows de-ceiling of ATM cells in structured data transmission according to ITU-Telecommunication Recommendation I. 363, reproduction of a plurality of STM frames represented at a speed of 64 kbpsxn (n=any natural number), and moreover, discloses an architecture that allows a minimum of the buffer amount due to the de-ceiling. The ATM/STM converter according to the present invention includes an AAL1 processor 101, a common buffer section 102 that stores ATM cell payloads using link-list queues and in which a pointer within that link list is also stored, a write controller 103 that manages write addresses to the common buffer section, a read controller 105 that manages read addresses to the common buffer section, an empty cell address FIFO section 104 that manages a list of empty cell addresses within the common buffer section, a buffer initialization controller 107 that initializes the common buffer section, a frame position detector 108 that monitors the frame position of STM signals, and a CM section 106 that relates channel arrangement on the STM side with VP on the ATM side.
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