| 摘要 |
According to the invention, the transistors of a semiconductor memory are connected to terminals in the cell field and on the periphery without using silicide. In order to obtain a sufficiently low resistance, an implantation into the S/D areas is carried out using an additional mask (Z). Said mask covers areas of the cells which are sensitive to damage in the area surrounding the cell node whilst leaving the other doped areas of the respective conductivity type free. In order to prevent implantation-related lattice distortions in the area of the memory electrode, the first doped area (6) of the designated selection transistor, which is connected to the electrode, is more weakly doped than the second doped area (7) of the selection transistor which is connected to the bit line. |
