发明名称 SEMICONDUCTOR PREPARATION AND INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable formation of electrical inter-connection between an outside layer and an inside layer, even when alignment is deviated by providing the second layer of a first material, which extends outside beyond the upper edge part of a contact-point opening part, inside the contact-point opening part up to the second thickness which is thicker than the first thickness, outside an etching stop layer. SOLUTION: A second layer 58 of a first material is stuck outside an etching stop layer 50 and inside a contact-point opening part 52, up to a second thickness. The second thickness forms the second layer 58 which extends outside beyond a contact-point opening part upper edge 56, thicker than the first thickness. Then, the first material of the second layer 58 is removed, and a plug 60 of the second layer of a first material is formed inside the contact-point opening part 52, and a mask pattern 64 which connects a base region 54 through the second layer plug 60 is formed. After that, parts of the etching stop layer, such parts as a first layer 48, and the second layer plug 60 which was not masked are etched. Thereby, conductive circuit parts such as a conductive line 66 connecting the base region 54 through the second layer 60 is constituted.
申请公布号 JPH08107147(A) 申请公布日期 1996.04.23
申请号 JP19950188934 申请日期 1995.07.25
申请人 MICRON TECHNOL INC 发明人 SAN TAN
分类号 H01L23/522;H01L21/28;H01L21/768;H01L21/822;H01L23/485;H01L27/04;H01L29/417;(IPC1-7):H01L21/768 主分类号 H01L23/522
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