发明名称 |
TIMING TRANSFER CIRCUIT FOR DIGITAL COMMUNICATION NETWORK |
摘要 |
Disclosed is a time information transmittance circuit for a digital communication network including an 1PPS generation time calculation circuit which measures the delay time between predetermined time slots generated at the shortest time after the transfer state of the 1PPS clock is generated when a clock signal is transmitted through a predetermined time slots of E1 frame, and 1PPS transfer information and TOD information transmittance circuit which transmits an 1PPS transfer information and a TOD information output from the 1PPS generation time calculation circuit through a predetermined time slots of E1 frame. Thus, a soft-handoff function can be smoothly performed.
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申请公布号 |
KR0129148(B1) |
申请公布日期 |
1998.04.08 |
申请号 |
KR19940036347 |
申请日期 |
1994.12.23 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KIM, YOUNG-ILL;CHON, SANG-YOUNG;BAEK, SEUNG-JOON;SONG, ILL-HYUN;LEE, KYUNG-JOON |
分类号 |
H04L7/033;(IPC1-7):H04L7/033 |
主分类号 |
H04L7/033 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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