Power-on reset control circuit

摘要

A power-on reset control circuit and associated method for deactivating a global power-on-reset signal based on whether circuitry, critical to correct functionality of an electronic system employing the power-on reset, is functioning correctly. The power-on reset control circuit comprises a control emulation circuit for transmitting a control signal through a first control line to indicate that the circuitry is operating correctly. The power-on reset control circuit further comprises a control verification circuit, coupled to the control emulation circuit through the first control line, for deactivating the global power-on reset signal upon receiving an active local power-on reset signal indicating that the power source is providing a voltage at an operating threshold level and the active control signal from the control emulation circuit.