摘要 |
PURPOSE:To realize the clock smoothing circuit easy in manufacturing and requiring no adjustment by utilizing a digital communication path activated by a clock independently of a clock to generate a data. CONSTITUTION:When data insertion takes place, a 2nd counter 2 counts down and after the state transits from the state of an initial count O to a maximum value (m-1), the counter 2 reaches sequentially down-count. According to the operation, a selector 5 selects an output 106 of a shift register 4. Thus, a preceding clock signal by one clock is outputted at first from an output 107 of the selector 5 and while the clock phase is sequentially reduced by each 1/n, the original selecting state is restored. As a result, one clock is inserted in the output clock 107. Thus, the digital clock smoothing circuit with ease of manufacture and requiring no adjustment is realized, in which a sudden change in the clock phase of the clock from a reception circuit of a stuff multiplexer is smoothed into a slow change. |