发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain a semiconductor device which prevents a malfunction due to a latch-up phenomenon when a power supply is turned on by a method wherein a bias generation circuit is installed at every power-supply voltage system and a bias voltage is applied to a well provided with a circuit to which different power-supply voltages are supplied. SOLUTION: A bias voltage VBP1 and a bias voltage VBN1 which are generated by a bias circuit 20 and a bias circuit 21 are applied to a well provided with a circuit system to which a power-supply voltage Vcc and an installation voltage Vss are supplied. A bias voltage VBS2 and a bias voltage VBN2 which are generated by a bias circuit 16 and a bias circuit 17 which are installed separately from the circuits 20, 21. That is to say, the bias circuits 20, 21 in the VBP1 system and the VBN2 system to which the Vcc is supplied and the bias circuits 16, 17 in the VBP2 and the VBN2 to which a Vcc2 is applied can generated the bias voltages respectively separately. As a result, even when any of the voltage Vcc and the voltage Vcc2 is applied, it is possible to prevent a latch-up phenomenon generated in conventional circuits.
申请公布号 JPH1079193(A) 申请公布日期 1998.03.24
申请号 JP19970138741 申请日期 1997.05.28
申请人 TOSHIBA MICROELECTRON CORP;TOSHIBA CORP 发明人 NOZAWA YASUMITSU;NAKAMURA KENICHI;OTANI TAKAYUKI;SEGAWA MAKOTO
分类号 G11C11/413;G11C5/14;G11C11/407;H01L21/822;H01L21/8244;H01L27/04;H01L27/11 主分类号 G11C11/413
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