发明名称 Evaluation and amplifier circuit
摘要 An evaluation and amplifier circuit of the type of a keyed flipflop including at least two first transistors of a given channel type connected in series to each other disposed between first and second signal lines, has a connection from the gates of the first transistors to a respective one of the second and first signal lines. The first two transistors respectively form a first node common to the first two transistors for receiving a first control signal. A series circuit has at least two second transistors of the same channel type as the first transistors being connected in parallel to the first transistors, The gates of the first transistors are further connected with a respective one of the second and first signal lines. Furthermore, the amplifier circuit includes the feature that the second transistors form a second node common to the second transistors for receiving a second control signal, and a differential signal appearing on the signal lines is evaluated and amplified by the second transistors after the first transistors have received the differential signal.
申请公布号 US5731718(A) 申请公布日期 1998.03.24
申请号 US19960723847 申请日期 1996.09.30
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 RIEGER, JOHANN
分类号 G11C11/417;G11C7/06;G11C11/409;G11C11/4091;(IPC1-7):G01C7/00 主分类号 G11C11/417
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