发明名称 |
Method and apparatus for a high efficiency two-stage rotating priority arbiter with predictable arbitration latency |
摘要 |
A scalable, two-stage rotating priority arbiter with re-circulation and bounded latency for use in multi-threaded, multi-processing devices. An apparatus implementing the two-stage arbiter includes a plurality of masters configured in a plurality of clusters, a plurality of targets, and an chassis interconnect that may be controlled to selectively connects a given master to a given target. The chassis interconnect includes multiple sets of bus lines connected between the plurality of clusters and the plurality of targets forming a cross-bar interconnect, including sets of bus lines corresponding to a command bus. A two-stage arbitration scheme is employed to arbitrate access to the command bus. The first arbitration stage is used to arbitrate between target requests issued by masters in a given cluster. The second arbitration stage is used to arbitrate between winning first-stage target requests. One embodiment of the arbitration scheme employs a rotating priority arbitration scheme at the first stage. Another embodiment employs a complementary rotating priority arbitration scheme at the second stage.
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申请公布号 |
US2006221980(A1) |
申请公布日期 |
2006.10.05 |
申请号 |
US20050097067 |
申请日期 |
2005.03.31 |
申请人 |
BOSE BIJOY;LAKSHMANAMURTHY SRIDHAR;ROSENBLUTH MARK B;VAZ IRWIN J;MEDAPATI SURI;O'YANG EDWIN |
发明人 |
BOSE BIJOY;LAKSHMANAMURTHY SRIDHAR;ROSENBLUTH MARK B.;VAZ IRWIN J.;MEDAPATI SURI;O'YANG EDWIN |
分类号 |
H04L12/56;H04L12/28;H04L12/66 |
主分类号 |
H04L12/56 |
代理机构 |
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主权项 |
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地址 |
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