| 摘要 |
<p>PURPOSE:To easily save power by stopping the operation of the clock generating circuit unless an access request is inputted from the outside. CONSTITUTION:A timer circuit 180 is reset in response to an internal access signal a2 and outputs a control signal a3 only while the count value of an internal clock input signal a1 is settled within a prescribed value. A synchronizing circuit 160 synchronizes the control signal a3 and outputs a synchronized signal a4 after inverting it through an inverter 190. Under the control of the inverted synchronized signal a5, a clock driver 170 outputs a clock output signal. A flip-flop circuit 200 is set in response to the internal access signal a1 and reset when the inverted synchronized signal a5 is changed from a low level to a high level and only while the flip-flop circuit is set, a first input circuit 130 is operated.</p> |
