| 摘要 |
<p>The invention is directed to a writing method which suppresses inter-cell interference when writing data to a single transistor type ferroelectric memory. In this memory stripelike conducting electrodes form row electrodes, and semiconductor strips form column electrodes. The writing method includes a first procedure based on a V/3 rule and a succeeding second procedure. In the first procedure, when a voltage of +V is applied to the row electrode of a selected cell while a voltage of zero is applied to the respective column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of +(2/3)V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the electrode of the selected cell, while a voltage of +V/3 is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes. In the first procedure, when a voltage of -V is applied to the row electrode of the selected cell while a voltage of zero is applied to the respective column electrode, and voltages of -V/3 are applied to the other row eiectrodes, and voltages of -(2/3)V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the row electrode of the selected cell while a voltage of -V/3 is applied to the respective column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes. <IMAGE> <IMAGE></p> |
