发明名称 |
Method and apparatus for dynamic conversion of computer instructions |
摘要 |
An instruction cache design which converts a sequential instruction stream into a compound format in the instruction cache. The conversion from sequential instructions to compound instructions is performed by an instruction stream interpreter unit (ISU), which is placed between the instruction cache and main memory. The conversion process is performed when an instruction cache miss occurs. Each line in the instruction cache contains a single compound instruction. The format of this compound instruction is transparent to programmers and will vary depending on the number of execution units which are to be supported.
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申请公布号 |
US5721854(A) |
申请公布日期 |
1998.02.24 |
申请号 |
US19960703804 |
申请日期 |
1996.08.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
EBCIOGLU, MAHMUT KEMAL;GROVES, RANDALL DEAN |
分类号 |
G06F9/318;G06F9/38;(IPC1-7):G06F9/45 |
主分类号 |
G06F9/318 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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