发明名称 Generation of video signal to control line jump process on computer monitor
摘要 The VGA graphics card has a RAM-DAC block 10 that receives digital data via a FIFO memory 12 and delivers RGB output 20. The output signal is in two parts that relate to odd and even numbered lines. The intensity of both part signals are proportional to the output. The phase of the signals is related to the line length. Both signals are added together. Separate processors 21,22 are used to handle the pixel data of odd and even numbered lines.
申请公布号 DE19628180(A1) 申请公布日期 1998.01.22
申请号 DE19961028180 申请日期 1996.07.12
申请人 MIRO COMPUTER PRODUCTS AG, 38112 BRAUNSCHWEIG, DE 发明人 SCHARPING, BERND, 38154 KOENIGSLUTTER, DE
分类号 G09G5/395;H04N5/44;H04N9/64;(IPC1-7):G09G1/28;G09G1/04;H04N5/21;H04N3/16 主分类号 G09G5/395
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