| 摘要 |
A frequency multiplier circuit receives an input signal and generates an output signal. The input waveform (110) has a frequency F1. The output waveform (112) has a frequency nF1 wherein n is an even integer. The frequency multiplier circuit comprises first and second transistors T1 and T2, each transistor having a base, emitter, and collector. The emitters of each transistor are coupled together and are connected to an output load (108). The collectors of each transistor are coupled together and are connected to a voltage potential (109). The base of each transistor receives an input waveform, wherein a first input waveform (110) at the first transistor base is 180 DEG out of phase with a second input waveform (111) at the second transistor base. |
