发明名称 Implementing scatter/gather operations in a direct memory access device on a personal computer
摘要 A direct memory access (DMA) circuit includes a first register for storing an address for the transfer of data, apparatus for transferring data at sequential addresses beginning at the address in the first register until all data at sequential addresses has been transferred, a second register for storing a beginning address for a list of addresses, and a state machine which responds to the completion of a transfer of data at sequential addresses beginning at the address in the first register and an indication that more data is to be transferred to transfer an address from the list at the address in the second register to the first register and causes the apparatus for transferring data to commence.
申请公布号 US5708849(A) 申请公布日期 1998.01.13
申请号 US19970791008 申请日期 1997.01.27
申请人 INTEL CORPORATION 发明人 COKE, JAMES S.;BHATT, AJAY V.;GRAHAM, STAN;LENT, DAVID
分类号 G06F13/28;(IPC1-7):G06F13/10 主分类号 G06F13/28
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