Dual bus computer architecture utilizing distributed arbitrators and method of using same

摘要

A dual bus architecture for a computer system including a number of computer system devices and a number of computer system resources. Each of the computer system devices and computer system resources are coupled by first and second communication busses. First and second bus arbitrators provide bus arbitration functions allowing first and second computer system devices to access first and second computer system resources simultaneously. A method of accessing a number of computer system resources by a number of computer system devices coupled by a dual bus architecture is also provided.