发明名称 Data read circuit of a memory
摘要 A data read circuit of a memory includes an inverting unit, a precharging unit, a first amplifying unit, a second amplifying unit, and an output buffer unit. The inverting unit inverts data from a sense amplifier, and the precharging unit precharges a data bus line to Vcc/2. The first amplifying unit receives and amplifies the inverted data, and the second amplifying unit is commonly connected to an input terminal of the first amplifying unit to receive and amplify the signal output from the inverting unit. The output buffer unit receives, inverts and outputs the signal amplified by the first and second amplifying units.
申请公布号 US5708607(A) 申请公布日期 1998.01.13
申请号 US19960724886 申请日期 1996.10.03
申请人 LG SEMICON CO., LTD. 发明人 LEE, SANG HYUN;SUNG, HA MIN
分类号 G11C11/417;G11C7/10;G11C11/409;H03F3/45;(IPC1-7):G11C7/00 主分类号 G11C11/417
代理机构 代理人
主权项
地址