发明名称 INSULATED GATE BIPOLAR TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To lower the saturation voltage by forming a first conductivity type region doped heavier than a first conductivity type base layer at least partially between the first conductivity type base layer and a second conductivity type channel region. SOLUTION: A gate electrode layer 7 of polysilicon, for example, is provided through a gate oxide 6 on the surface of a p-channel region 4 interposed between the surface exposed part of an n-base layer 3 and an n-emitter region 5. An emitter electrode 8 of an Al alloy is provided while touching the surface of the p-channel region 4 and the n-emitter region 5 commonly. A p-collector layer 1 is formed on the opposite surface layer of the n-base layer 3 and a collector electrode 9 is provided while touching the surface thereof. An n-type region 11 doped heavier than the n-base layer 3 is formed on the boundary of the p-channel region 4 and the n-base layer 3.
申请公布号 JPH09326486(A) 申请公布日期 1997.12.16
申请号 JP19960140561 申请日期 1996.06.04
申请人 FUJI ELECTRIC CO LTD 发明人 YOSHIKAWA ISAO
分类号 H01L29/08;H01L29/739;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/08
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