发明名称 Leiterplatte mit lötbarer dünner Metallschicht zum Auflöten von elektronischen Bauelementen
摘要 A solder bonding metal layer which is formed on a circuit board comprises a metal layer having a mixture of first metal which is easily wetted with metals constituting the solder and which easily forms alloy or intermetallic compounds and of second metal which is not wetted easily with the above solder and not melted. In this case, a concentration gradient that the concentration of the first metal is high on the bonding surface may be formed in the metal layer. A circuit board having a solder bonding metal layer which keeps good bonding even after many times of repairs and improves the reliability is realized.
申请公布号 DE4301728(C2) 申请公布日期 1997.12.11
申请号 DE19934301728 申请日期 1993.01.22
申请人 HITACHI, LTD., TOKIO/TOKYO, JP 发明人 HARADA, MASAHIDE, YOKOHAMA, KANAGAWA, JP;ANDO, AKIHIRO, YOKOHAMA, KANAGAWA, JP;SATOH, RYOHEI, YOKOHAMA, KANAGAWA, JP;YABUSHITA, AKIRA, YOKOHAMA, KANAGAWA, JP;KANDA, NAOYA, YOKOSUKA, KANAGAWA, JP;HORIKOSHI, KAZUHIKO, KAWASAKI, KANAGAWA, JP
分类号 B23K35/00;H01L23/498;H05K1/09;H05K3/24;(IPC1-7):H05K1/09;B23K35/24;H05K3/34;H05K3/16 主分类号 B23K35/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利