| 摘要 |
PURPOSE:To facilitate designing by performing selection of information, based on a transmitted/received timing signal, for a separation/multiplex logic coupled through a bus with a multiple information transmitter/processor thereby enabling modification of the separation/multiplex logic module corresponding to the type and the characteristic of required information. CONSTITUTION:Separation/multiplex logics 111-11n are coupled through an internal bus 12 with a multiplex/separation logic section 13. The logic section 13 multiplexes data inputted from the logic sections 111-11n with channel unit and bit unit based on a control signal on the bus, and the multiplexed data is outputted from the logics 111-11n while being separated with channel unit and bit unit. A processor 14 communicates control signals through an interface 15 with synchronous separating sections 161, 162 and transmitting/receiving sections 171, 172 which communicate data with other terminals. |
