READ/WRITE RANDOM ACCESS MEMORY WITH DATA PREFETCH

摘要

A dual port, random access, read/write memory is provided such that each microprocessor can access shared memory locations without regard to the state of the other microprocessor. Previously known dual port systems use delays, called wait states, or handshaking techniques to control memory access and to resolve overlapping memory access requests. This invention avoids the need for special timing controls by improving memory response time. Once a valid address is placed on the address bus by the microprocessor, which is recognized by the memory as being within its range of assigned address values, the memory prefetches the data at that address on the chance that a read request for that address may soon follow. If it does, then the data is placed on the data bus. If it does not, then the prefetched data is ignored and a write operation takes place for the particular address.