发明名称 NONVOLATILE SEMICONDUCTOR MEMORY AND ITS WRITING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To make it possible to suppress the threshold value of a memory cell after writing or erasing to a certain predetermined range without overwriting by verifying by verifying means with a plurality of decided voltages. SOLUTION: A memory call array 11 has a plurality of blocks each of which consists of a plurality of memory cells connected to the same row line as one block. The data written by writing means of the data in the cell is verified by the verifying means. The verification by the verifying means is conducted by a plurality of decision voltages. As a circuit configuration, in addition to the array 11, a row decoder 12, a sense/latch circuit 13, a column decoder 14, a column gate 15, a booster 16, a control circuit 17, and an I/O buffer 18 are provided. the distribution width of the threshold value of the cell written thereby can be sufficiently narrowed.</p>
申请公布号 JPH09307082(A) 申请公布日期 1997.11.28
申请号 JP19960145089 申请日期 1996.05.15
申请人 TOSHIBA CORP 发明人 IWATA YOSHIHISA
分类号 H01L21/8247;G11C16/02;G11C16/04;G11C16/10;G11C16/34;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115;H01L21/824 主分类号 H01L21/8247
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