发明名称 Multi-layer interconnect for integrated circuit
摘要 <p>A metal interconnect having a high conductivity and high resistance to metal migration failure is formed of two layers of metal or alloy (such as TI/cuAlsi) with a dielectric interposed therebetween and a connection made between the layers by a conductive material, preferably in the form of a plug or stud formed in an aperture of an inter-level dielectric, at ends of the interconnect. A high precision metal-to-metal capacitor can be formed from the same layers by forming separate connections to each of the layers. The topography of the interconnect (and capacitor) is of reduced severity and facilitates planarization of an overlying inter-level dielectric. <IMAGE></p>
申请公布号 EP0809290(A2) 申请公布日期 1997.11.26
申请号 EP19970303230 申请日期 1997.05.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 EL-KAREH, BADIH;RYAN, JAMES E.
分类号 H01L21/02;H01L21/768;H01L21/822;H01L21/8242;H01L23/522;H01L23/532;H01L27/04;H01L27/108;(IPC1-7):H01L23/522 主分类号 H01L21/02
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