| 摘要 |
A method of integrated circuit fabrication is disclosed. Layers of silicon nitride and silicide dioxide are formed upon a silicon substrate. These layers are etched to create a channel having the width of the intended gate. The silicon dioxide is then wet etched. Next, polysilicon is deposited within the channel. The silicon dioxide and the silicon nitride layers are then removed. A T-shaped polysilicon gate facilitates the formation of rectangular-shaped silicon nitride spacers. Subsequent salicidation is performed.
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