Simple mass production of integrated semiconductor device

摘要

A process for producing an integrated semiconductor structure, having I<2>L logic inverters in combination with highly blocking npn transistors, involves subjecting a p-type semiconductor substrate to (a) masking and introducing a slowly diffusing n-type first dopant for forming buried layer zones which are then annealed; (b) masking and introducing a p-type second dopant for forming buried separation zones; (c) masking and introducing a rapidly diffusing n-type third dopant for forming additional buried layer zones; (d) annealing the buried separation zones and the additional buried layer zones; (e) epitaxially growing a single crystal n-type semiconductor layer; (f) masking and introducing a p-type fourth dopant to form p<+> separation zones aligned with the buried separation zones; (g) masking and introducing an n-type fifth dopant for forming n<+> deep connection zones; (h) masking the npn base zone (8), the I<2>L base connection zone (8') of the I<2>L injector (8") and the I<2>L base zone (9) with a first auxiliary layer (12c); (i) covering the I<2>L base (9) with a second auxiliary layer (13c); (j) introducing a p-type sixth dopant into the base zones (8, 8', 8") and into the I<2>L base (9); (k) removing the second auxiliary layer (13c); (l) introducing a p-type seventh dopant into the base zones (8, 8', 8"); and (m) masking and introducing an n-type eighth dopant to form the collectors of the I<2>L logic inverters (11) and the emitters (10b) and collectors (10a) of the npn transistors.