| 摘要 |
A dual port video memory having both a random access memory and a serial access memory is provided. Memory cell column lines are provided in a memory cell array for constructing the random access memory. Each of the memory cell column lines is divided into a plurality of partial column lines. Data is sensed in each of the partial column lines in correspondence to the row selected during random access. A serial register of serial access memory is provided on each side of two adjacent memory cell column lines. These registers are connected to the two adjacent memory cell column lines via gate elements for data transfer of the random access memory and the serial access memory. By selectively controlling the gate elements, it is possible to use the four-divided partial column lines as transfer paths when deactivated, thus reducing the power consumption and improving the integration rate of the video memory. Further, the video memory is capable of providing to various transfer modes.
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