发明名称 Voltage level interface circuit with separate reference signal input and folded cascode structure
摘要 A low-voltage, high-speed voltage level interface circuit for signal level translation between circuits operating at different supply voltages. The circuit utilizes a folded cascode structure with a separate reference voltage to achieve high-speed and low-voltage performance. Voltage divider circuits are provided at the signal and reference inputs.
申请公布号 US5684414(A) 申请公布日期 1997.11.04
申请号 US19960594618 申请日期 1996.02.02
申请人 U.S. PHILIPS CORPORATION 发明人 LINEBARGER, DANIEL J.;NAVID, NASROLLAH SAEED
分类号 H03K19/018;H03K19/0185;(IPC1-7):H03K19/018 主分类号 H03K19/018
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