发明名称 |
TRANSISTOR CURRENT GENERATOR STAGE FOR INTEGRATED ANALOG CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide the current generator stage for integrated analog circuit in which a power-down time and a power-up time are considerably reduced. SOLUTION: A current generator stage 1 of a type having a current source 2 inserted between a 1st reference power supply voltage Vdd and, a 1st fixed reference voltage GND is provided with a at least one current mirror circuit 5 connecting to a current source 2 to produce at least one output current and a bias circuit 10 connecting to the current source 2 to apply a bias voltage to the current source. The bias circuit 10 of the current generator stage 1 has an energy storage circuit 11, and the energy storage circuit 11 is in the 1st circuit mode indicating a combination of a 1st reactance X1 and a 2nd reactance X2 when the current source 2 is set in the 1st operating mode and in the 2nd circuit mode to apply a prescribed bias voltage to the current source 2 when the current source 2 is in the 2nd operation mode. |
申请公布号 |
JPH09284063(A) |
申请公布日期 |
1997.10.31 |
申请号 |
JP19960129619 |
申请日期 |
1996.05.24 |
申请人 |
SGS THOMSON MICROELETTRONICA SPA;KONSORUTSUIIO PERU LA RIC SUTSURA MIKUROERETSUTOROONIKA NERU METSUZOJIORUNO |
发明人 |
MERUKIOTSURE BURUTSUKOREERI;GAETAANO KOSENCHIINO;MARUKO DEMICHIERI;JIUSETSUPE PATSUTEI |
分类号 |
G05F3/22;G05F3/26;H03F3/343;H03K17/04;H03K17/60 |
主分类号 |
G05F3/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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