| 摘要 |
PROBLEM TO BE SOLVED: To attain a small scale circuit configuration and to improve the throughput. SOLUTION: This method adopts a matched filter 105 to take correlation with a reception signal, a peak detection circuit 109 detects a peak of a correlation signal, a clock phase detection circuit 110 and a clock selector circuit 112 select any of plural phase clocks based on the peak of one correlation signal. Then any of plural phase clocks generated from the phase clock via a delay line 104 is selected by a clock detection circuit 111 and a clock selector circuit 113 based on the peak of the correlation signal and the phase clock is outputted as a synchronization clock. |
