发明名称
摘要 PURPOSE:To simplify the circuit constitution and to attain high resolution by connecting a transistor (TR) in opposite polarity in parallel with a TR of different polarity in the 1st and 2nd CMOS inverter circuits respectively and controlling the TRs of the inverter circuits by clock signals of opposite polarity. CONSTITUTION:A MOS TR M41P of opposite polarity is connected in parallel with a TR M21N of the 1st CMOS inverter circuit and the gate is connected to a clock signal line 5a. Then a MOS TR M41N of opposite polarity is connected in parallel with a TR M31P of the 2nd CMOS inverter circuit, and the gate is connected to a clock signal line 5b. Thus, the circuit constitution is simplified and high resolution is attained.
申请公布号 JP2666361(B2) 申请公布日期 1997.10.22
申请号 JP19880115644 申请日期 1988.05.12
申请人 发明人
分类号 G09G3/36;H04N3/14;H04N5/66 主分类号 G09G3/36
代理机构 代理人
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