| 摘要 |
PURPOSE:To obtain the phase synchronizing loop circuit that the synchronous establishment time is short by determining the phase difference in input signals. CONSTITUTION:An address counter C1 allocates the count value in the inside reference signal to the digital input signal as an address value. A phase difference detection circuit C2 detects this address value at the edge position for this digital input signal. The average value of the phase difference measured each time the phase difference measurement necessary for one decided phase jump is performed is determined. When this value exceeds the preliminarily set allowable jitter amount, the average value of the phase difference calculated in an arithmetic circuit C4 is outputted as correction phase difference. The address counter C1 is reset by comparing the counted address value with the value of this correction phase difference. Thus, the synchronization between the phase of the digital signal and the phase of the inside reference signal is promptly confirmed. |
