发明名称 INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
摘要 PROBLEM TO BE SOLVED: To realize a device that satisfies the request of both low on-state resistance and high break down voltage by reducing effectively the current amplifying factor of parasitic bipolar transistors without increasing the on resistance of power MOSFET transistor. SOLUTION: A power device such as a power MOSFET with high avalanche breakdown voltage is realized by burying an oxide film 230 into an element and utilizing an SOI structure positively. The lifetime of the minority carrier of the single crystal of a region 310 around a boundary on an embedded oxide film 230 is shorter than the lifetime of the minority carrier of the single crystals of other regions so that the lifetime of the minority carrier can be made far shorter than that of a general epitaxial Si layer and the hFE of the parasitic bipolar transistors can be made very low value.
申请公布号 JPH09270513(A) 申请公布日期 1997.10.14
申请号 JP19960103962 申请日期 1996.03.29
申请人 TOYOTA CENTRAL RES & DEV LAB INC 发明人 UESUGI TSUTOMU;KAWAJI SACHIKO;KIGAMI MASAHITO
分类号 H01L29/06;H01L29/10;H01L29/739;H01L29/78 主分类号 H01L29/06
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