发明名称 Method and apparatus for designing a module
摘要 A method for designing a multilayer module for a semiconductor package and for determining connections within a multilayer module having input-output (IO) contacts in a first array defined by first array information. A chip within the module has C4 contacts arranged in a second array defined by second array information. The connections are intermediate pairs of the IO contacts and the C4 contacts among a plurality of layers. The method comprises the steps of storing the first and second array information in storage; identifying connection paths in a layer between the pairs according to a selection algorithm using the first and second array information; identifying crossing paths; swapping either the C4 or IO contacts of selected crossing paths; identifying paths being blocked by another connection path to identify a need for a next layer to complete the blocked connection paths; repeating the method for subsequent layers for a predetermined number of iterations or until all connection paths are defined.
申请公布号 US5677847(A) 申请公布日期 1997.10.14
申请号 US19950567611 申请日期 1995.12.05
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 WALLING, PAUL R.
分类号 G06F17/50;(IPC1-7):G06F19/50 主分类号 G06F17/50
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