发明名称 DECODING METHOD AND DEVICE
摘要 PROBLEM TO BE SOLVED: To accelerate decoding speed by detecting the head of an input data string by a prescribed length so as to output decoded data corresponding to a variable length code included in the detected part. SOLUTION: A CPU 1 reads 10-bits at a head of a received binary data stream in a RAM 3 and substitutes them to an area of a variable BS of a register 12. Then the CPU 1 reads values OUT, UB and RB from a ROM 2 by using the variable BS as an address. The CPU 1 deletes the UB-bits at the head of the received binary data stream in the RAM 3. When the CPU 1 discriminates the RB-bits to be '0', the CPU 1 provides the output of the read values OUT as decoded data. On the other hand, when the CPU 1 discriminates the RB-bits not to be '0', the CPU 1 reads the RB-bits at the head of the received binary data stream in the RAM 3 and substitutes the RB-bits to the area of the variable BS of the register 12. Then the CPU 1 calculates the sum of the value BS and the OUT-bits and provides the output of the sum as decoded data.
申请公布号 JPH09270712(A) 申请公布日期 1997.10.14
申请号 JP19960079873 申请日期 1996.04.02
申请人 SONY CORP 发明人 OKI MITSUHARU
分类号 H04N19/423;H03M7/00;H03M7/30;H03M7/40;H04N1/41;H04N7/24;H04N19/00;H04N19/44;H04N19/46;H04N19/625;H04N19/70;H04N19/91 主分类号 H04N19/423
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