| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce power consumption and to speed operation by reducing the consumed current flowing in bit lines and also the loading capacity connected to the bit lines. SOLUTION: The bit line BL0 is divided into four bit lines, and the divided bit lines BL0A-BL0D are respectively connected to four memory blocks A-D composed of plural memory cells, pass transistors 1-4 and precharge transistors 5-8. When a memory block A is selected by an address, the corresponding pass transistor 1 alone is turned on and the pass transistors 2-4 of the other memory blocks are turned off. Furthermore only the precharge transistor 5 of the memory block A is turned off, and the precharge transistors 6-8 of the other memory blocks are kept on to hold the precharge state and read the data out from the selected memory block.</p> |
