| 摘要 |
PURPOSE:To improve performance at a high speed by making a space between a gate and a drain longer than one between the gate and a source. CONSTITUTION:A depletion layer 11 is formed onto the surface of a channel layer 2, the whole region from a gate 7 to a dummy gate 8. Since a section between a source 3 and the gate 7 is shortened and parasitic resistance Rsg is reduced in the same manner as conventional devices, the decrease of mutual conductance gm can be inhibited while capacitance Cgd between the gate 7 and a drain 4 is lowered, and breakdown strength between the gate-drain 7, 4 can be increased. Even when gate length is brought to 0.8mum or less, a space between the source 3 and the drain 4 is lengthened because the dummy gate 8 is shaped, thus suppressing a short channel effect. Accordingly, performance at high speed is improved. |
