| 摘要 |
A signal processing apparatus is arranged to convert a multi-bit audio signal having the conventional sampling frequency fs KHz and m quantizing bits (m is an integer) into a one-bit audio signal having the sampling frequency 64xfs KHz and one quantizing bit. Hence, the apparatus can offer an audio signal in a highly dynamic range. Further, the signal processing apparatus is arranged to separate sub-data added to the multi-bit audio signal in transmission from the multi-bit audio signal, sigma-delta modulate the multi-bit audio signal through the effect of a sigma-delta modulator. This suppresses the adverse effect on the audio signal. The apparatus is also arranged to control the supply of a timing signal and a clock signal to the sigma-delta modulator and a D/A converter based on the sub-data. This makes it possible to positively control a switching timing. |
