| 摘要 |
<p>A semiconductor memory device comprises a memory cell array having electrically erasable and programmable memory cells arranged in rows and columns, each memory cell capable of storing n-value data (n is 3 or a greater natural number), and a data circuit having m latch circuits for holding data items read from said memory cells, wherein data items read from said memory cells and held in k latch circuits (k < m) are output from the memory device before data items read from said memory cells are held in the remaining (m-k) latch circuits, during data-reading operation. <IMAGE></p> |
