| 摘要 |
PROBLEM TO BE SOLVED: To prevent unnecessary and adverse influence on an external part by detecting a fatal system fault with double bus errors that a bus error occurs until a bus error exception processing is terminated and stopping a processor. SOLUTION: When the bus error is detected in the detection circuit 101 of the double bus errors, a node (b) is asserted and the occurrence of the bus error is informed to the processor through a circuit 102 generating an exception interruption processing as interruption which cannot be masked and the exception processing is executed, The state of a bus containing an address, data and a read write signal, in which the bus errors occur, 4s held in a bus error time bus information storage circuit 106. When the bus error occurs and the double bus errors are detected, a node (d) is asserted, the stop signal of the processor is asserted in a stop signal generation circuit 104 and the processor is immediately stopped. |
