| 摘要 |
A method of reducing the capacitance in an integrated circuit (1) is comprised of the step of anisotropically etching oxide (2) not masked by metal interconnects (3). The anisotropic etch may be performed down to the substrate (8) or end before the substrate (8) is reached. By removing the oxide (2) between metal lines (3) and replacing it with air, the capacitance between metal lines (3) and the substrate (8) is reduced as is the capacitance between adjacent metal lines. |
