发明名称 PHASE DIFFERENCE DETECTING CIRCUIT AND DIGITAL PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a phase difference detecting circuit capable of precisely detecting phase difference information by a simple configuration and to provide PLL circuit using the circuit. SOLUTION: Data sampled by a sampling clock which is twice the frequency of an input signal is classified into difference sample data e1 and detecting point sample data d1 on every other sample. Then, an edge concerning the input signal is detected (d3) from the two kinds of detecting point sample data in front and rear of successively inputted detecting point sample data d1. Phase difference between the input signal and the clock is detected through the use of difference sample data value e1 between the two kinds of detecting point sample data whose edges are detected by an edge detecting means and at least one detecting point sample data value (d2).
申请公布号 JPH09247136(A) 申请公布日期 1997.09.19
申请号 JP19960073033 申请日期 1996.03.05
申请人 SONY CORP 发明人 FUKUDA SHINICHI
分类号 H03L7/085;H04L7/033 主分类号 H03L7/085
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