发明名称 HANDOTAISHUSEKIKAIRO
摘要 PURPOSE:To obtain the semiconductor integrated circuit which can execute a function test by applying a large scale scan path method using a lot of scan registers. CONSTITUTION:Each scan register 20 inputs a test data input clock for designating timing to move test data from an input terminal and outputs the test data input clock from an output terminal through a buffer, the output terminal is connected to the input terminal of the high-order scan register, and the test data input clock is inputted to the input terminal of the least significant scan register. The test data are successively transmitted from the most significant scan register to a low-order direction. Since the test data input clocks are successively transmitted from the least significant scan register to a high-order direction, the value of the flip-flop of the scan register at the moving destination of the data is updated before changing a moving source.
申请公布号 JP2653945(B2) 申请公布日期 1997.09.17
申请号 JP19910219034 申请日期 1991.08.29
申请人 KAWASAKI SEITETSU KK 发明人 KONDO HISASHI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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